CPL03-CMJD4500

Bare die,15.700 X 15.700 mils,CLD Series

Case Type: CHIP,WAFFLE

Dynamic Impedance (Z_T)

0.2 MΩ

Junction Temperature (T_j)

-65 — 150 °C

Knee Impedance (Z_K)

10 kΩ

Limiting Voltage (V_L)

3.7 V

Peak Operating Voltage (P_OV)

100 V

Power Dissipation (P_D)

445 mW

Power Dissipation (P_D)

780 mW

Regulator Current (I_P)

3.9 — 5.1 mA

(4.5 mA Typical)

Storage Temperature (T_stg)

-65 — 150 °C

Temperature Coefficient (T_C)

-0.5 — -0.22 %/°C

Thermal Resistance Junction-Ambient (Θ_JA)

280 °C/W

Thermal Resistance Junction-Ambient (Θ_JA)

160 °C/W

Part	Package	Buy	Status	Description	ECCN Code	HTS Code	Termination
CPL03-CMJD4500-CM	WafflePack@400		Active	Bare die,15.700 X 15.700 mils,CLD Series	EAR99	8541.10.0040	PBFREE
CPL03-CMJD4500-CT	WafflePack@400		Active	Bare die,15.700 X 15.700 mils,CLD Series	EAR99	8541.10.0040	PBFREE


Item	Type
No matching documents found.
Analytical Test Report:Active Device, Rectifier	Analytical Test Report
Analytical Test Report:Die	Analytical Test Report
Analytical Test Report:Die	Analytical Test Report
Analytical Test Report:Wafer Schottky	Analytical Test Report
Analytical Test Report:Wafer Switching Diode	Analytical Test Report
Analytical Test Report:Wafer Transistor	Analytical Test Report
CPL03-CMJD0130_SERIES_WPD.PDF	Device Datasheet
Package Detail Document:WAFER	Package Detail Document
Product Brief:PB CPL03-CMJD SER	Product Brief